Audio-GD R-8 MK3 True Balanced Fully Discrete R-2R DAC, BNC Port Switchable for Coaxial Input / 75Ω 10MHz External Clock

Please note:

 If user want the R8 MK3 work with the external clock input , can update the firmware , the IN2 BNC input become the external 10MHz input. Download the R-8 EC firmware in the below link.The Extermal clock must be 10MHz, 75 ohm, 1-3Vp-p level, recommend the square wave output ,though sine wave also can work.

Unique Jitter elimination technology:

    Jitter has always been regarded as the root cause for sound quality of digital systems to be inferior to that of high-end analog systems.
      In some traditional DAC designs, the clock processing method is to follow and to restore the clock of the signal source, and some designs also include the capacity of reducing jitter, but with limitations when the jitter level is large.
     This common solution allows getting good measurements in lab tests. But in actual use, most signal sources have large jitter levels, so that the resulting sound quality will not be satisfactory.
      Some DACs worth only USD150 measure better then than some well-selling DACs of foreign brands worth tens of thousands. Who would think that this USD150 DAC is better? This reminds me of when the China Insurance Research Institute tested a direct collision between two brands of cars not long ago, and netizens commented on the car that scored higher in the test: "It has not failed the test, but it has not won the actual battle either."
      The following three product charts are from three DACs of different brands, guess which one is the most expensive? (The answer is at the bottom of this page)

First it reads and stores a considerable amount of signal source data to RAM, discard the clock of the signal source, and directly use the high-performance built-in Accusilicons to clock the output from the RAM. Since both data and clock are handled by the FPGA, the impact of transmission on jitter is neglectable. The jitter level is essentially the same as what is specified for the TCXO clocks used by the R8 MK2.

     The key to this processing method is to ensure the integrity of data transmission, which is our technical secret. Realize that as soon as a single data sample within a million is lost in the transmission, a sharp and obvious cracking sound, like static, or a scratch on a vinyl, will be heard during playback.

       Mr. He is passionate about music and, too him, listening sessions are a source of inspiration for new design ideas. Our cie does not only have the advantage of having full control over software and hardware technology, we also possess a correct understanding of music reproduction. Without having to rely on outsourcing for R&D, we can at any moment listen to the gears during development, allowing the pursuit and realization of the most realistic sound reproduction.
R-8 MK3 feature:
 It has been 3 years since the R-8 was launched in 2018. Thanks to the fully programmable circuits of the R-8, we have continuously updated the firmware to improve the owner experience.
         The R-8 MK3 was designed and tested at the beginning of 2020, which was followed by a year of continuous audition, software and hardware fine-tuning.
         Using the latest discrete servo stabilized power supply, whose performance is comparable to batteries after more than a year of calibration and optimization for each part of the circuit.
         The DA parts use these new discrete servo stabilized power supplies, the analog circuits are still powered by pure class-A power supplies to achieve the best sound, as determined during listening tests.
        Productions and sales were not scheduled until we were fully satisfied with how realistic the sound was. The improvement is quite obvious compared to the previous generation.
1. Fully discrete parts are used in a truly balanced current transmission design.
         Four sets of fully discrete and independent DSD hardware decoders.
         Eight sets of fully discrete R-2R DA modules to form a two-channel balanced push-pull decoder.
         Using the latest designed discrete servo stabilized power supply to feed the DA circuits, the noise level is comparable to that of a battery, but without the dry and thin sound characteristics of it, and thus the product's operating temperature is significantly lower than that of the previous model. The analog circuit are still powered by a pure class-A regulated power supply for the best sound results (New upgrade)
2. By listening to a turntable and studying its sound for a long time, we have successfully integrated the analog vinyl sound characteristics into this product, this being allowed optionally through the front panel. (New feature)
3. Both the USB and HDMI inputs are equipped with isolators, and two sets of linear power supplies to separately supply power to the USB and HDMI modules before the isolators to prevent interference from signal sources.
        a, USB uses a two-way transmission isolator, which not only transmits IIS signals to the FPGA processor, but also receives the synchronous clock signal sent by the FPGA processor.
        The USB interface itself is no longer equipped with clocks. The synchronous clock is applied to make the signal transmission more accurate and upgrade sound quality to an excellent level. The sound quality is now in fact better then with the previous generation R-8 2020 version fed by the DI-20 (not quite as good as with DI-20HE however).
       b, the HDMI module is now equipped with an independent isolator to improve the sound quality of the HDMI input.
4. Display of the input signal sampling rate function. (New feature)
5. The digital circuits of the whole DAC are comprised of 1 FPGA and 5 CPLDs (both programmable devices), which allow separating the different functional circuits and preventing interference.
       The FPGA operates using the parallel data processing mode.
       The IIS signal is serial data transmission. Each data bit requires one clock cycle. One frame of left and right channel data requires 64 clock cycles, so stability over a 64 clock cycles is needed.
        The parallel mode only needs one clock to transmit and process the 32-bit data of the left and right channels, which greatly improves the processing speed and is less affected by the stability of the clock.
       IIS input data (USB and HDMI-IIS) is reorganized into two sets of 32-bit parallel data as soon as it is inputted. After the SPDIF signal is demodulated, it is also sent to the next level of processing through two sets of 24-bit parallel data.
      DSD data is also reorganized into two groups of 64-bit parallel data processing as soon as it is inputted.
According to listening comparisons, the parallel processing mode can make the sound clearer and more neutral, with better dynamics and a more analog flavor.
6. 2 top-notch Accusilicon TCXOs with frequencies of 90 and 98MHz provide synchronization for the whole unit, and they are applied to the playback of all data rates without PLL up-conversion. The clock management design of the new architecture makes the clock work more stably, which brings higher transparency and more details.
7. DSD uses the built-in asynchronous clock to enhance timing, which obviously improves the clarity and dynamics of reproduction.
8. SPDIF supports DOP playback.
9. All digital mode settings can be changed on the front panel live.
10. A firmware upgrade port is featured on the rear panel of the machine (no need to open to take off the cover to upgrade the firmware).